ASIC FPGA Engineer

Company: General Dynamics Mission Systems
Location: Tempe
Posted on: January 22, 2025

Job Description:

Requires a Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field. Also requires 2 years of job-related experience or a Master's degree. CLEARANCE REQUIREMENTS: Department of Defense TS/SCI security clearance is preferred at time of hire. Candidates must be able to obtain a TS/SCI clearance within a reasonable amount of time from date of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required. ROLE AND POSITION OBJECTIVES: As an Application Specific Integrated Circuit (ASIC) / Field Programmable Gate Array (FPGA) verification engineer for GD-MS Space & Intelligence Systems, you'll be a member of a cross functional team responsible for designing devices used in cutting-edge space payloads. "You can't send a repairman up into space" Our job to make sure that our clients never need to As a FPGA/ASIC engineer , you'll work on getting cutting-edge technology ready to function in space. The systems you'll design will be vital to our nation's fundamental defense. You'll be working on state-of-the-art technology and tackling some of the most challenging technical obstacles- some of which have never been addressed before. The space industry is continually breaking new barriers with respect to tech, speed and cost. Your job is to imagine, architect, develop and test GDMS ASIC/FPGAs to ensure the integration of software, hardware, reliability, maintainability, and safety so our solutions do what we say they will and won't fail in space. Here's why people find this work exciting: Make a Difference: Our work makes a difference to the defense and protection of our country. Which is why you will need to obtain a TS/SCI security clearance. You'll work with Geniuses every day In this role you'll get to work with some of the most intelligent and insightful tech leaders on the planet - and guess what - they want to share what they know. They are accessible and want to collaborate. Sometimes Geniuses can be unapproachable Our geniuses are anything but. They want to collaborate and share what they know, which makes working here a mind-expanding experience. Never the Same Thing Twice: The scope of this role is broad and varied. To succeed, you'll have to speak multiple disciplines of engineering to be able to architect solutions which consider all aspects of the design and constraints. Solve The Most Challenging and Difficult Tech Problems. If you want to stretch your tech capability to the max - you've come to the right place. There is no more unforgiving tech environment than space, and the tech challenges are enormous and exciting. Work Life Balance - It's still a thing: Yes, we're directly competing against SpaceX and Blue Origin, so tech design also means meeting ever changing cost and speed constraints. First to market is critical to securing future contracts which means you'll have to be agile, flexible, innovate constantly and rapidly. However, unlike other players in this space we still respect your weekends - work life balance is still a thing here. Yes, we got a competitive salary, generous health and personal benefits, flexible work environment and your contributions are recognized and rewarded. But we also have Algorithmic prowess. We can dream up anything, but now it must be affordable which requires us to select and deploy the absolute best chip tech and software to make it work. If this sounds interesting to you, we should talk. . . Basic Qualifications for ASIC /FPGA Design Engineer: Bachelor's degree in Electrical Engineering or a related discipline and a minimum of 2 years of relevant experience (1 years with an MS) Ability to generate micro architecture and detailed design approaches Proficient in async design principals, timing closure , and constraint generation Proficiency in HDL (VHDL/Verilog) Proficiency in scripting languages such as Tcl , Python , or Perl Effective communication , presentation skills , and high proficiency in technical problem solving U.S. citizenship with the ability to obtain and maintain a security clearance Preferred Qualifications: Leads technical tasks or small projects Understanding of high reliability design principals Experience with Xilinx and Microchip FPGAs along with associated tools (ISE, Vivado , Libero) Experience with s ynthesis tools (Precision, Synplify ) Experience with verification tools ( QuestaSim /UVM ) Experience with clock-domain-crossing tools (Questa CDC) Experience with lab bring-up and debug ( Oscilloscope, Logic Analyzer , ChipScope ) Active DoD Secret Clearance or higher What sets you apart: Clear understanding of embedded micro-processing systems, FPGA Design and Verification using Verilog/VHDL, and digital circuit analysis and design Collaborative, creative thinker with high proficiency in technical problem solving Team player with effective communication and presentation skills Experience designing high speed interfaces and complex memory designs Commitment to ongoing professional development for yourself and others Our Commitment to You: An exciting career path with opportunities for continuous learning and development. Research oriented work, alongside award winning teams developing practical solutions for our nation's security Flexible schedules with every other Friday off work, if desired (9/80 schedule) Competitive benefits, including 401k matching, flex time off, paid parental leave, healthcare benefits, health & wellness programs, employee resource and social groups, and more See more at gdmissionsystems.com/careers/why-work-for-us/benefits Workplace Options: This position is fully onsite for the first year then transitioning to flex. While on-site, you will be a part of the Scottsdale Arizona facility This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled. USD $108,942.20 - USD $120,857.80 /Yr. At General Dynamics Mission Systems, we rise to the challenge each day to ensure the safety of those that lead, serve, and protect the world we live in. We do this by making the world's most advanced defense platforms even smarter. Our engineers redefine what's possible and our manufacturing team brings it to life, building the brains behind the brawn on submarines, ships, combat vehicles, aircraft, satellites, and other advanced systems. We pride ourselves in being a great place to work with this shared sense of purpose, committed to a diverse and exciting employee experience that drives innovation and creates a community where all feel welcome and a part of something amazing. We offer highly competitive benefits and a flexible work environment where contributions are recognized and rewarded. To see more about our benefits, visit General Dynamics is an Equal Opportunity/Affirmative Action Employer that is committed to hiring a diverse and talented workforce. EOE/Disability/Veteran

Keywords: General Dynamics Mission Systems, Gilbert , ASIC FPGA Engineer, Engineering , Tempe, Arizona